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Icarus Verilog
Computer languages C,Verilog  +
Documentation note http://iverilog.wikia.com/wiki/Main_Page
Full description Icarus Verilog is a Verilog simulation andIcarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code writen in Verilog (IEEE-1364) into some target format. For batch simulation, the compiler can generate an intermediate form called vvp assembly. This intermediate form is executed by the ``vvp'' command. For synthesis, the compiler generates netlists in the desired format. The compiler proper is intended to parse and elaborate design descriptions written to the IEEE standard IEEE Std 1364-2001. The standard proper was released towards the middle of the year 2001, though in a rather pricey electronic form. This is a fairly large and complex standard, so it will take some time for it to get there, but that's the goal. '''NOTE: Under the Version information please browse the Installation link to find the proper download link.''' link to find the proper download link.'''
Homepage URL http://www.icarus.com/eda/verilog/  +
Interface command-line  +
Is GNU false  +
Keywords synthesizer  + , compiler  + , simulation  + , Verilog  + , compile  + , Semiconductor  + , synthesis  + , semiconductors  + , simulations  + , hardware description language  + , HDL  +
Last review by Kelly Hopkins +
Last review date 15 January 2009  +
License GPLv2 + , BSD 3Clause + , Boost +
License verified by Kelly Hopkins  +
License verified date 15 January 2009  +
Name Icarus Verilog  +
Real name Stephen Williams  +
Resource URL ftp://ftp.icarus.com/pub/eda/verilog/v0.8/  + , http://www.icarus.com/eda/verilog/Release_Notes_for_Icarus_Verilog_0_8.html  + , http://www.icarus.com/eda/verilog/bugs.html  +
Resource audience Developer  + , Bug Tracking  +
Resource kind Download  + , Homepage  + , Bug Tracking  +
Revisionid 6,144  +
Revisiontimestamp 12 April 2011 11:04:04  +
Revisionuser User:WikiSysop +
Role Maintainer  +
Science engineering  +
Short description a Verilog simulation and synthesis tool.  +
Software-development compiler  + , small-specific-development-task  +
Submitted by Database conversion +
Submitted date 1 April 2011  +
Use science  + , software-development  +
User level intermediate  +
Version date 15 January 2009  +
Version download http://iverilog.wikia.com/wiki/Installation_Guide  +
Version identifier 0.8.7  +
Version status stable  +
Has queryThis property is a special property in this wiki. Icarus Verilog + , Icarus Verilog + , Icarus Verilog + , Icarus Verilog + , Icarus Verilog + , Icarus Verilog + , Icarus Verilog + , Icarus Verilog + , Icarus Verilog +
Modification dateThis property is a special property in this wiki. 1 August 2014 23:18:21  +
Page has default formThis property is a special property in this wiki. Entry  +
Has subobjectThis property is a special property in this wiki. Icarus Verilog + , Icarus Verilog + , Icarus Verilog + , Icarus Verilog + , Icarus Verilog + , Icarus Verilog + , Icarus Verilog +
EmailThis property is a special property in this wiki. steve@icarus.com  +
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