Difference between revisions of "Verilog"
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upgrade path. This package may be safely removed after upgrading. | upgrade path. This package may be safely removed after upgrading. | ||
|Homepage URL=http://iverilog.icarus.com | |Homepage URL=http://iverilog.icarus.com | ||
| − | | | + | |Is High Priority Project=No |
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|Computer languages=C++ | |Computer languages=C++ | ||
| − | | | + | |Decommissioned/Obsolete=No |
| − | | | + | |Accepts cryptocurrency donations=No |
|Version identifier=0.9.7-1 | |Version identifier=0.9.7-1 | ||
| − | |Version download=http://ftp.debian.org/debian/pool/main/i/iverilog/iverilog_0.9.7.orig.tar.gz | + | |Version download=http://ftp.debian.org/debian/pool/main/i/iverilog/iverilog_0.9.7.orig.tar.gz |
| − | | | + | |Test entry=No |
| + | |Last review by=Bendikker | ||
| + | |Last review date=2018/04/25 | ||
|Submitted date=2015-07-17 | |Submitted date=2015-07-17 | ||
| − | + | |Is GNU=No | |
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}} | }} | ||
{{Project license | {{Project license | ||
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|Role=contact | |Role=contact | ||
|Email=steve@icarus.com | |Email=steve@icarus.com | ||
| + | }} | ||
| + | {{Resource | ||
| + | |Resource audience=Ruby (Ref) | ||
| + | |Resource URL=https://rubygems.org/gems/verilog | ||
| + | }} | ||
| + | {{Resource | ||
| + | |Resource audience=Debian (Ref) | ||
| + | |Resource URL=https://tracker.debian.org/pkg/verilog | ||
| + | }} | ||
| + | {{Resource | ||
| + | |Resource audience=Debian (Ref) (R) | ||
| + | |Resource URL=https://tracker.debian.org/pkg/iverilog | ||
}} | }} | ||
{{Resource | {{Resource | ||
|Resource kind=Download | |Resource kind=Download | ||
|Resource URL=http://iverilog.icarus.com | |Resource URL=http://iverilog.icarus.com | ||
| + | }} | ||
| + | {{Software category}} | ||
| + | {{Featured}} | ||
| + | {{Import | ||
| + | |Date=2015-07-17 | ||
| + | |Source=Debian | ||
| + | |Source link=http://packages.debian.org/sid/iverilog | ||
}} | }} | ||
Latest revision as of 17:14, 25 April 2018
Verilog
http://iverilog.icarus.com
Icarus verilog compiler (transitional package)
Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs.
The compiler can target either simulation, or netlist (EDIF).
This is a dummy transitional package that will ensure a proper upgrade path. This package may be safely removed after upgrading.
Licensing
License
Verified by
Verified on
Notes
License
Verified by
Debian: أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy@sabily.org>
Verified on
24 August 2013
Notes
License: mit
License
Verified by
Debian: أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy@sabily.org>
Verified on
24 August 2013
Notes
License: gpl-2+
Leaders and contributors
| Contact(s) | Role |
|---|---|
| Stephen Williams | contact |
Resources and communication
| Audience | Resource type | URI |
|---|---|---|
| Debian (Ref) | https://tracker.debian.org/pkg/verilog | |
| Debian (Ref) (R) | https://tracker.debian.org/pkg/iverilog | |
| Ruby (Ref) | https://rubygems.org/gems/verilog | |
| Download | http://iverilog.icarus.com |
Software prerequisites
Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the page “GNU Free Documentation License”.
The copyright and license notices on this page only apply to the text on this page. Any software or copyright-licenses or other similar notices described in this text has its own copyright notice and license, which can usually be found in the distribution or license text itself.