Difference between revisions of "Alliance"

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(Created page with "{{Entry |Name=Alliance |Short description=CAD tools |Full description=Complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simul...")
 
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|Short description=CAD tools
 
|Short description=CAD tools
 
|Full description=Complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. Advanced verification tools for functional abstraction and static timing analysis are part of the system. A complete set of portable CMOS libraries is provided, including a RAM generator, a ROM generator, and a data-path compiler.
 
|Full description=Complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. Advanced verification tools for functional abstraction and static timing analysis are part of the system. A complete set of portable CMOS libraries is provided, including a RAM generator, a ROM generator, and a data-path compiler.
 +
|Homepage URL=http://www-asim.lip6.fr/recherche/alliance/
 
|User level=none
 
|User level=none
|Status=Live
 
 
|Component programs=asimut,bop,bbr,lvx,dpr,lynx,dreal,glop,druc,proof,fpgen,ring,fpmap,s2r,genlib,scmap,genpat,scr,genview,syf,graal,l2p
 
|Component programs=asimut,bop,bbr,lvx,dpr,lynx,dreal,glop,druc,proof,fpgen,ring,fpmap,s2r,genlib,scmap,genpat,scr,genview,syf,graal,l2p
|Homepage URL=http://www-asim.lip6.fr/recherche/alliance/
 
 
|VCS checkout command=:pserver:anoncvs@asim.lip6.fr:/cvsroot
 
|VCS checkout command=:pserver:anoncvs@asim.lip6.fr:/cvsroot
 
|Computer languages=C
 
|Computer languages=C
 
|Documentation note=User manual available in HTML format from http://www-asim.lip6.fr/recherche/alliance/manual
 
|Documentation note=User manual available in HTML format from http://www-asim.lip6.fr/recherche/alliance/manual
|Paid support=
 
|IRC help=
 
|IRC general=
 
|IRC development=
 
 
|Related projects=PythonCAD,Atlc,QCad_-_Community_Edition,PCB
 
|Related projects=PythonCAD,Atlc,QCad_-_Community_Edition,PCB
 
|Keywords=CAD,vhdl,industrial design,alliance,desing and manufacturing
 
|Keywords=CAD,vhdl,industrial design,alliance,desing and manufacturing
|Is GNU=n
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|Version identifier=5.1.1
|Last review by=Janet Casey
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|Version date=2014/08/09
|Last review date=2005-05-12
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|Version status=stable
 +
|Version download=http://www-asim.lip6.fr/pub/alliance/distribution/latest/alliance-5.1.1.tar.bz2
 +
|Version comment=5.1.1 stable released 2014-08-09
 +
|Last review by=Alejandroindependiente
 +
|Last review date=2016/12/24
 
|Submitted by=Database conversion
 
|Submitted by=Database conversion
 
|Submitted date=2011-04-01
 
|Submitted date=2011-04-01
|Version identifier=5.0-20050217
+
|Status=
|Version date=2005-02-17
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|Is GNU=No
|Version status=stable
+
|License verified date=2001-02-17
|Version download=http://www-asim.lip6.fr/pub/alliance/distribution/5.0/alliance-5.0-20050217.tar.gz
+
}}
 +
{{Project license
 +
|License=GPLv2orlater
 +
|License verified by=Janet Casey
 
|License verified date=2001-02-17
 
|License verified date=2001-02-17
|Version comment=5.0-20050217 stable released 2005-02-17
 
 
}}
 
}}
 
{{Person
 
{{Person
 
|Role=Maintainer
 
|Role=Maintainer
|Real name=
 
|Email=
 
 
|Resource URL=
 
|Resource URL=
 
}}
 
}}
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}}
 
}}
 
{{Software category
 
{{Software category
|Business=cad,productivity
+
|Business=cad, productivity
|Interface=library,x-window-system
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|Interface=library, x-window-system
 
|Works-with=cad
 
|Works-with=cad
 
}}
 
}}
{{Project license
+
{{Featured}}
|License=GPLv2orlater
 
|License verified by=Janet Casey
 
|License verified date=2001-02-17
 
}}
 

Revision as of 17:49, 24 December 2016


[edit]

Alliance

https://www-soc.lip6.fr/equipe-cian/logiciels/alliance/
CAD tools

Complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. Advanced verification tools for functional abstraction and static timing analysis are part of the system. A complete set of portable CMOS libraries is provided, including a RAM generator, a ROM generator, and a data-path compiler.





Licensing

License

Verified by

Verified on

Notes

Verified by

Janet Casey

Verified on

17 February 2001




Leaders and contributors

Contact(s)Role
Maintainer


Resources and communication

AudienceResource typeURI
Bug Tracking,Developer,SupportE-mailmailto:alliance-users@asim.lip6.fr
Python (Ref)https://pypi.org/project/alliance
Ruby (Ref)https://rubygems.org/gems/alliance
Debian (Ref)https://tracker.debian.org/pkg/alliance


Software prerequisites




Entry


















Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the page “GNU Free Documentation License”.

The copyright and license notices on this page only apply to the text on this page. Any software or copyright-licenses or other similar notices described in this text has its own copyright notice and license, which can usually be found in the distribution or license text itself.